The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

Dec. 03, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Jeremy Dunworth, La Jolla, CA (US);

Hyunchul Park, San Diego, CA (US);

Bon-Hyun Ku, San Diego, CA (US);

Vladimir Aparin, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/21 (2006.01); H03F 3/195 (2006.01); H03F 3/213 (2006.01); H03F 1/56 (2006.01); H03F 3/45 (2006.01); H03F 1/02 (2006.01); H03F 3/30 (2006.01); H03F 3/345 (2006.01); H03F 3/193 (2006.01); H03F 3/24 (2006.01);
U.S. Cl.
CPC ...
H03F 3/211 (2013.01); H03F 1/0261 (2013.01); H03F 1/565 (2013.01); H03F 3/193 (2013.01); H03F 3/195 (2013.01); H03F 3/213 (2013.01); H03F 3/245 (2013.01); H03F 3/301 (2013.01); H03F 3/345 (2013.01); H03F 3/45179 (2013.01); H03F 3/45475 (2013.01); H03F 2200/267 (2013.01); H03F 2200/294 (2013.01); H03F 2200/318 (2013.01); H03F 2200/336 (2013.01); H03F 2200/405 (2013.01); H03F 2200/411 (2013.01); H03F 2200/451 (2013.01); H03F 2200/48 (2013.01); H03F 2200/534 (2013.01); H03F 2200/537 (2013.01); H03F 2200/541 (2013.01); H03F 2203/30081 (2013.01); H03F 2203/30114 (2013.01); H03F 2203/30144 (2013.01); H03F 2203/45228 (2013.01); H03F 2203/45731 (2013.01);
Abstract

The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors.


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