The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

Aug. 28, 2018
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Takeshi Murata, Yokkaichi Mie, JP;

Yoshinori Nakakubo, Yokkaichi Mie, JP;

Hiroaki Hayasaka, Yokkaichi Mie, JP;

Naoki Yamamoto, Kuwana Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11529 (2017.01); H01L 27/11551 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11529 (2013.01); H01L 27/11551 (2013.01);
Abstract

A semiconductor memory device includes a first insulating layer over a semiconductor substrate, a metal layer, an adhesive layer on a first region of the metal layer, a conductive layer on a second region of the metal layer and on the adhesive layer, a second insulating layer on the conductive layer, a plurality of wiring layers that are separated from each other and are stacked above the second insulating layer, a semiconductor layer that extends in a first direction perpendicular to the semiconductor substrate and includes a bottom surface connected to the conductive layer, a storage portion disposed between at least one of the plurality of wiring layers and the semiconductor layer, and a slit that extends in the first direction, includes aside surface in contact with the plurality of wiring layers and a bottom surface reaching the conductive layer, and is filled with an insulating material.


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