The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2021
Filed:
Jan. 27, 2020
Applicant:
Mitsubishi Electric Corporation, Tokyo, JP;
Inventors:
Manami Noda, Tokyo, JP;
Kota Kimura, Tokyo, JP;
Assignee:
Mitsubishi Electric Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/535 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/16 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01); H01L 23/29 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 23/535 (2013.01); H01L 23/291 (2013.01); H01L 29/1608 (2013.01); H01L 29/417 (2013.01); H01L 29/41725 (2013.01); H01L 29/42372 (2013.01); H01L 29/66 (2013.01); H01L 29/7397 (2013.01); H01L 29/7813 (2013.01); H01L 29/66734 (2013.01);
Abstract
A gate electrode is formed in a trench formed in a semiconductor substrate. A gate interlayer insulating film is formed to cover the gate electrode and the like. A gate interconnection and an emitter electrode are formed in contact with the gate interlayer insulating film. A glass coating film and a polyimide film are formed to cover the gate interconnection and the emitter electrode. A solder layer is formed to cover the polyimide film. The gate interconnection and the emitter electrode are each formed of a tungsten film, for example.