The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2021
Filed:
Apr. 30, 2019
Xilinx, Inc., San Jose, CA (US);
Abhishek Joshi, San Jose, CA (US);
Grigor S. Gasparyan, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Some examples described herein relate to routing in routing elements. In an example, a design system includes a processor and a memory, storing instruction code, coupled to the processor. The processor is configured to execute the instruction code to model a communication network comprising switches interconnected in an array of data processing engines (DPEs), generate global routes of nets in the modeled communication network, generate detailed routes of the nets using the global routes, and translate the detailed routes to a file. Each of the switches has multiple input or output channels connected to another switch that are modeled as a single input or output edge, respectively, connected to the other switch. Each global route is generated through edge(s) of the switches. Each detailed route is generated comprising identifying one of the multiple input or output channels modeled by each edge through which the respective global route is generated.