The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2021
Filed:
Apr. 27, 2018
Xilinx, Inc., San Jose, CA (US);
Ian A. Swarbrick, Santa Clara, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Embodiments herein describe a SoC that includes a mapper that identifies a destination ID for routing a transaction through a NoC. In one embodiment, the NoC includes ingress and egress logic blocks which permit hardware elements in the SoC to transmit and receive data using the NoC. In one embodiment, the ingress logic blocks can include the mapper that identifies a destination ID for each transaction. In one embodiment, the mapper can receive a destination ID from the hardware element that submitted the transaction to the ingress logic block. In this case, the mapper can bypass the address map by using the provided destination ID. If a destination ID is not provided, however, the mapper can use an address provided in the transaction to identify the destination ID.