The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2021
Filed:
May. 21, 2019
Wenzhou University, Zhejiang, CN;
Pengjun Wang, Zhejiang, CN;
Hongzhen Fang, Zhejiang, CN;
Gang Li, Zhejiang, CN;
Bo Chen, Zhejiang, CN;
Wenzhou University, Zhejiang, CN;
Abstract
A true random number generator with stable node voltage comprises a loop control logic, two inverters identical in structure, two D flip-flops identical in structure, a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a monitoring module and a post-processing module. Each inverter comprises a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a tenth NMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor and an eleventh PMOS transistor. The true random number generator has the advantages of being able to eliminate the capacitive coupling effect and has high randomness.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile