The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Apr. 07, 2020
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Akihiko Yoshioka, Tokyo, JP;

Shinya Suzuki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/12 (2006.01); G02F 1/1345 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 21/50 (2006.01); H01L 23/485 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02F 1/13452 (2013.01); H01L 21/50 (2013.01); H01L 23/3157 (2013.01); H01L 23/48 (2013.01); H01L 23/485 (2013.01); H01L 23/522 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/83 (2013.01); H01L 2021/60232 (2013.01); H01L 2021/60262 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/1147 (2013.01); H01L 2224/13027 (2013.01); H01L 2224/13099 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/14104 (2013.01); H01L 2224/16105 (2013.01); H01L 2224/293 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29075 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/73203 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/83851 (2013.01); H01L 2924/0001 (2013.01); H01L 2924/00011 (2013.01); H01L 2924/00012 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01015 (2013.01); H01L 2924/01022 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01046 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/04941 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15788 (2013.01); H01L 2924/19043 (2013.01);
Abstract

A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad. In other words, the wires are arranged in space which becomes available because the pad is small enough.


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