The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

May. 23, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kenneth Rodbell, Sandy Hook, CT (US);

Davood Shahrjerdi, White Plains, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 31/18 (2006.01); G06F 21/87 (2013.01); H01L 27/142 (2014.01); H01L 31/0693 (2012.01); H01L 27/144 (2006.01);
U.S. Cl.
CPC ...
H01L 23/573 (2013.01); G06F 21/87 (2013.01); H01L 27/142 (2013.01); H01L 27/1443 (2013.01); H01L 31/0693 (2013.01); H01L 31/1852 (2013.01); H01L 31/1892 (2013.01); G06F 2221/2143 (2013.01); Y02E 10/544 (2013.01); Y02P 70/50 (2015.11);
Abstract

A method for making a photovoltaic device is provided that includes the steps of providing a silicon substrate having a complementary metal-oxide semiconductor ('CMOS'); bonding a first layer of silicon oxide to a second layer of silicon oxide wherein the bonded layers are deposited on the silicon substrate; and forming a III-V photovoltaic cell on a side of the bonded silicon oxide layers opposite the silicon substrate, wherein when the III-V photovoltaic cell is exposed to radiation, the III-V photovoltaic cell generates a current that powers a memory erasure device to cause an alteration of a memory state of a memory cell in an integrated circuit.


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