The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Sep. 18, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Regina Nottelmann, Bad Sassendorf, DE;

Mark Schnietz, Lippstadt, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/055 (2006.01); H01L 23/495 (2006.01); H01R 12/58 (2011.01);
U.S. Cl.
CPC ...
H01L 23/055 (2013.01); H01L 23/49534 (2013.01); H01R 12/585 (2013.01);
Abstract

A power semiconductor module arrangement includes a substrate including a dielectric insulation layer, a first metallization layer arranged on a first side of the dielectric insulation layer, and a second metallization layer arranged on a second side of the dielectric insulation layer, the dielectric insulation layer being disposed between the first and second metallization layers. The arrangement further includes at least one first connection element mounted on the substrate, a housing having sidewalls, and at least one second connection element. Each second connection element includes a first part extending vertically through a sidewall of the housing, a second part coupled to a first end of the first part and protruding from the sidewall in a vertical direction, and a third part coupled to a second end of the first part opposite the first end. Each third part is detachably coupled to one of the at least one first connection element.


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