The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Nov. 25, 2016
Applicant:

Gemalto SA, Meudon, FR;

Inventors:

Frederic Gallas, Meudon, FR;

Rudy Yanto, Meudon, FR;

Vincent Dumas, Meudon, FR;

Fabrice Vergnes, Meudon, FR;

Assignee:

THALES DIS FRANCE SA, Meudon, FR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/04 (2006.01); G11C 16/32 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G06F 3/064 (2013.01); G06F 3/0608 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01); G11C 16/0483 (2013.01); G11C 16/32 (2013.01);
Abstract

The invention relates to a method for managing an memory LNVM erasable by block. The method comprises an index management of the memory blocks wherein the index indicates if a block is erased (Erased) or to be erased (TBE). A memory manager performs a block erasing when the memory is not in use and a block is to be erased and when the number of erased blocks is lower than a predetermined number.


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Gallas, Frederic. (2021). Electronic device with memory erased by page (U.S. Patent No. 10957398). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10957398

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