The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Aug. 04, 2017
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventors:

Tetsuo Kikuchi, Sakai, JP;

Hajime Imai, Sakai, JP;

Takashi Terauchi, Sakai, JP;

Shinya Ohira, Sakai, JP;

Isao Ogasawara, Sakai, JP;

Satoshi Horiuchi, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); H01L 27/12 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3655 (2013.01); G02F 1/1362 (2013.01); H01L 27/1218 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0439 (2013.01);
Abstract

An active-matrix substrate according to an embodiment of the present invention includes a plurality of first TFTs that are arranged within a display area, an inorganic insulating layer that covers the plurality of first TFTs, an organic insulating layer that is provided on the inorganic insulating layer, a plurality of second TFTs that are arranged within a non-display area, and a source and gate metal connection portion that is positioned within the non-display area, a first conductive layer that is formed from an identical conductive film with a gate wiring line and a second conductive layer that is formed from an identical conductive film with a source wiring line being connected to each other at the source and gate metal connection portion. Each of the plurality of first TFTs is an oxide semiconductor TFT. At least one second TFT among the plurality of second TFTs is covered with the organic insulating layer. The source and gate metal connection portion is not covered with the organic insulating layer.


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