The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2021
Filed:
Jun. 15, 2018
Ellis Robinson Giles, Houston, TX (US);
Peter Joseph Varman, Houston, TX (US);
Ellis Robinson Giles, Houston, TX (US);
Peter Joseph Varman, Houston, TX (US);
Other;
Abstract
Persistent Memory, byte-addressable non-volatile memory technologies, offer performance advantages and access similar to Dynamic Random Access Memory while having the persistence of disk. Hardware Transactional Memory support, originally designed for DRAM concurrency control, can corrupt persistent memory transactions due to cache evictions before system failure. Unifying storage and memory on the main-memory bus and accessed directly while using HTM for concurrency control has previously required the additional burden of changes to processors to prevent possible data corruption. The present invention provides a solution for the durability of transactions to persistent memory while using HTM as a concurrency control mechanism, without any changes to processors or cache-coherency mechanisms. The invention includes a software only method and system that provides durability and ordering of HTM transactions to persistent memory. The invention also discloses a back-end memory controller that supports HTM transactions for durability to persistent memory without up-front processor changes.