Using hardware transactional memory to optimize reference counting

Abstract

An approach is provided for optimizing reference counting. Responsive to receiving code representing a program by a just-in-time compiler, one or more processors in computing machinery supporting transactional memory identify regions of the code having respective sets of reference counting operations executed dynamically. Identifying the regions of the code uses an analysis of semantics of the code. The identified regions are enclosed in respective transactions. The code that was to perform atomic operations, including the reference counting operations in the identified regions, is transformed into new code that performs non-atomic operations that are variants of the atomic operations. Fallback code sequences are inserted into the transformed code. In a non-transactional manner and in response to detections of failures in respective transactions, the fallback code sequences execute original code sequences that were in the code prior to the transformation of the code. The original code sequences include respective multiple atomic operations.