The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Jun. 06, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Jessica Hui-Chun Tseng, Fremont, CA (US);

Manoj Kumar, Yorktown Heights, NY (US);

Kattamuri Ekanadham, Mohegan Lake, NY (US);

Jose E. Moreira, Irvington, NY (US);

Pratap C. Pattnaik, Yorktown Heights, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 12/0815 (2016.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3853 (2013.01); G06F 9/30043 (2013.01); G06F 12/0815 (2013.01); G06F 2212/1021 (2013.01);
Abstract

An instruction fusion system in which instructions are tagged with extra bits to specify the conditions by which the instructions can be fused is provided. A computing device receives a first instruction to be executed at a processor. The computing device receives a first fusion tag that corresponds to the first instruction, the first fusion tag specifying a condition for fusing the first instruction with another instruction. The computing device determines whether the first instruction is allowed to fuse with a second instruction based on the first fusion tag. When the first instruction is allowed to fuse with the second instruction, the computing device generates a fused instruction based on the first instruction and the second instruction. The computing device executes the fused instruction at the processor.


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