The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Mar. 08, 2019
Applicants:

Arm Limited, Cambridge, GB;

The Regents of the University of Michigan, Ann Arbor, MI (US);

Inventors:

Vaibhav Gogte, Ann Arbor, MI (US);

Wei Wang, Cambridge, GB;

Stephan Diestelhorst, Cambridge, GB;

Peter M Chen, Ann Arbor, MI (US);

Satish Narayanasamy, Ann Arbor, MI (US);

Thomas Friedrich Wenisch, Ann Arbor, MI (US);

Assignees:

Arm Limited, Cambridge, GB;

The Regents of The University of Michigan, Ann Arbor, MI (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/52 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3851 (2013.01); G06F 9/3855 (2013.01); G06F 9/522 (2013.01);
Abstract

A data processing apparatus includes obtain circuitry that obtains a stream of instructions. The stream of instructions includes a barrier creation instruction and a barrier inhibition instruction. Track circuitry orders sending each instruction in the stream of instructions to processing circuitry based on one or more dependencies. The track circuitry is responsive to the barrier creation instruction to cause the one or more dependencies to include one or more barrier dependencies in which pre-barrier instructions, occurring before the barrier creation instruction in the stream, are sent before post-barrier instructions, occurring after the barrier creation instruction in the stream, are sent. The track circuitry is also responsive to the barrier inhibition instruction to relax the barrier dependencies to permit post-inhibition instructions, occurring after the barrier inhibition instruction in the stream, to be sent before the pre-barrier instructions.


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