The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Oct. 24, 2016
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventor:

Toshio Matsui, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/66 (2006.01); H01L 23/00 (2006.01); H03F 3/193 (2006.01); H01L 21/56 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H03F 1/26 (2013.01); H01L 23/295 (2013.01); H01L 23/3121 (2013.01); H01L 23/66 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H03F 3/193 (2013.01); H01L 21/56 (2013.01); H01L 23/49541 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6644 (2013.01); H01L 2224/4813 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48175 (2013.01); H01L 2224/49176 (2013.01); H01L 2924/13064 (2013.01); H01L 2924/30105 (2013.01);
Abstract

A transistor () is provided on a surface of a semiconductor substrate (). First and second wirings () are provided on the surface of the semiconductor substrate () and sandwich the transistor (). Plural wires () pass over the transistor () and are connected to the first and second wirings (). A sealing material () sealing the transistor (), the first and second wirings (), and the plural wires (). The sealing material () contains a filler (). An interval distance between the plural wires () is smaller than a particle diameter of the filler (). The sealing material () does not intrude into a space between the plural wires () and the transistor () so that a cavity () is formed.


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