The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Jan. 11, 2019
Applicant:

Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Wuhan, CN;

Inventors:

Yun Yu, Wuhan, CN;

Weiwei Yang, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); G06F 1/16 (2006.01); H01L 51/00 (2006.01); H01L 51/56 (2006.01); G09F 9/30 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3258 (2013.01); G06F 1/1652 (2013.01); G09F 9/301 (2013.01); H01L 51/0097 (2013.01); H01L 51/56 (2013.01); H01L 2227/323 (2013.01);
Abstract

The present disclosure provides an array substrate and a manufacturing method of the array substrate, and a display panel. The array substrate includes a flexible substrate; an active layer disposed on the flexible substrate; a first gate insulating layer disposed on the active layer; a first gate layer disposed on the first gate insulating layer; a second gate insulating layer disposed on the first gate insulating layer and the first gate layer; and a second gate layer disposed on the second gate insulating layer. The array substrate of the present disclosure replaces molybdenum wires of a gate layer and a second gate layer with a multi-layered composite metal layer. The bending tolerance of gate wires in the display panel is enhanced and increase of impedance of the first gate layer is prevented.


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