The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Jun. 21, 2018
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Daniel Tutuc, St. Niklas an der Drau, AT;

Hans Weber, Bayerisch Gmain, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 21/78 (2006.01); H01L 23/544 (2006.01); H01L 29/423 (2006.01); H01L 21/02 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76224 (2013.01); H01L 21/0243 (2013.01); H01L 21/02381 (2013.01); H01L 21/02436 (2013.01); H01L 21/02494 (2013.01); H01L 21/02518 (2013.01); H01L 21/76229 (2013.01); H01L 21/78 (2013.01); H01L 23/544 (2013.01); H01L 29/0634 (2013.01); H01L 29/1095 (2013.01); H01L 29/4236 (2013.01); H01L 29/7802 (2013.01); H01L 29/7813 (2013.01); H01L 21/02658 (2013.01); H01L 29/41766 (2013.01); H01L 2223/54426 (2013.01);
Abstract

Disclosed is a method. The method includes forming a trench structure with at least one first trench in a first section of a semiconductor body; forming a second trench that is wider than the first trench in a second section of the semiconductor body; and forming a semiconductor layer on a surface of the semiconductor body in the first section and the second section and in the at least one first trench and the second trench such that the semiconductor layer has a substantially planar surface above the first section and a residual trench remains above the second section. Forming the semiconductor layer includes forming a first epitaxial layer in a first epitaxial growth process and a second epitaxial layer on top of the first epitaxial layer in a second epitaxial growth process.


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