The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Aug. 13, 2019
Applicant:

Graphcore Limited, Bristol, GB;

Inventors:

David Lacey, Cheltenham, GB;

Daniel John Pelham Wilkinson, West Harptree, GB;

Richard Luke Southwell Osborne, Bristol, GB;

Matthew David Fyles, Wiltshire, GB;

Assignee:

GRAPHCORE LIMITED, Bristol, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 16/901 (2019.01); G06F 9/30 (2018.01); G06F 15/167 (2006.01); G06F 15/173 (2006.01); G06F 9/48 (2006.01); G06F 9/52 (2006.01); G06F 9/38 (2018.01); G06F 9/54 (2006.01); H04L 12/801 (2013.01); H04L 29/06 (2006.01); H04L 29/08 (2006.01);
U.S. Cl.
CPC ...
G06F 9/522 (2013.01); G06F 9/30043 (2013.01); G06F 9/3877 (2013.01); G06F 9/544 (2013.01); G06F 15/167 (2013.01); G06F 15/17331 (2013.01); G06F 16/9017 (2019.01); H04L 47/39 (2013.01); H04L 65/104 (2013.01); H04L 67/1095 (2013.01); H04L 67/1097 (2013.01); G06F 9/4881 (2013.01);
Abstract

A system comprising: a first subsystem comprising one or more first processors, and a second subsystem comprising one or more second processors. The second subsystem is configured to process code over a series of steps delineated by barrier synchronizations, and in a current step, to send a descriptor to the first subsystem specifying a value of each of one or more parameters of each of one or more interactions that the second subsystem is programmed to perform with the first subsystem via an inter-processor interconnect in a subsequent step. The first subsystem is configured to execute a portion of code to perform one or more preparatory operations, based on the specified values of at least one of the one or more parameters of each interaction as specified by the descriptor, to prepare for said one or more interactions prior to the barrier synchronization leading into the subsequent phase.


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