The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Nov. 17, 2017
Applicant:

The Mathworks, Inc., Natick, MA (US);

Inventors:

Girish Venkataramani, Cambridge, MA (US);

Rama P. Kokku, Natick, MA (US);

Jayaprabha Shankar, Natick, MA (US);

James L. Brock, Kingston, NH (US);

Chun-Yu Shei, Allston, MA (US);

Vijaya Raghavan, Brookline, MA (US);

Assignee:

The MathWorks, Inc., Natick, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01);
U.S. Cl.
CPC ...
G06F 8/452 (2013.01); G06F 8/445 (2013.01); G06F 8/4434 (2013.01); G06F 8/4441 (2013.01); G06F 8/456 (2013.01); G06F 8/458 (2013.01);
Abstract

Systems and methods generate code from a source program where the generated code may be compiled and executed on a Graphics Processing Unit (GPU). A parallel loop analysis check may be performed on regions of the source program identified for parallelization. One or more optimizations also may be applied to the source program that convert mathematical operations into a parallel form. The source program may be partitioned into segments for execution on a host and a device. Kernels may be created for the segments to be executed on the device. The size of the kernels may be determined, and memory transfers between the host and device may be optimized.


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