logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10949097 B1

PDFFull Text
Date of Patent:
Mar. 16, 2021

Filed:

Nov. 13, 2019

Peripheral component interconnect express (pcie) network with input/output (i/o) operation chaining to reduce communication time within execution of i/o channel operations

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Edward W. Chencinski, Poughkeepsie, NY (US);

Bruce Ratcliff, Red Hook, NY (US);

Eric N. Lais, Georgetown, TX (US);

Michael James Becht, Poughkeepsie, NY (US);

Matthias Klein, Wappingers Falls, NY (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

Steven Chiu, Esq.

Blanche E. Schiller, Esq.

Heslin Rothenberg Farley & Mesiti P.C.

Primary Examiner:

Tammara R Peyton

Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 13/16 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0613 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 13/1605 (2013.01); G06F 13/4282 (2013.01); G06F 2213/0026 (2013.01);
Abstract

A set of memory access operations is obtained. The set of memory access operations includes a plurality of memory access operations to be chained, in which the plurality of memory access operations are to be processed as an atomic unit. The plurality of memory access operations are executed in a particular order, and one or more results are provided.

Find Patent Forward Citations

Quick Actions:

Chencinski, Edward. (2021). Peripheral component interconnect express (pcie) network with input/output (i/o) operation chaining to reduce communication time within execution of i/o channel operations (U.S. Patent No. 10949097). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10949097

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…