The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Jan. 18, 2019
Applicant:

Allegro Microsystems, Llc, Manchester, NH (US);

Inventors:

Glenn A. Forrest, Bow, NH (US);

Thomas J. Kovalcik, Barrington, NH (US);

Wei Zhang, Nashua, NH (US);

Assignee:

Allegro MicroSystems, LLC, Manchester, NH (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01); G01R 31/28 (2006.01); H01L 21/66 (2006.01); G01R 31/30 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2851 (2013.01); G01R 31/3012 (2013.01); H01L 22/34 (2013.01);
Abstract

A sensor integrated circuit including a regulator for generating a regulated voltage includes a digital load configured to draw a load current from the regulator in response to a clock signal during in situ operation and a comparator configured to determine the absence or presence of a fault during in situ operation. The load current is less than or equal to a predetermined level in the absence of a fault and is greater than the predetermined level in the presence of a fault. The comparator is responsive to the load current and to a threshold level and is configured to generate a comparator output signal having a level indicative of whether the load current is less than or greater than the threshold level in order to thereby determine the absence or presence of a fault during in situ operation, respectively.


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