The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

Jun. 25, 2019
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Katarzyna Kowalik-Seidl, Munich, DE;

Bjoern Fischer, Munich, DE;

Winfried Kaindl, Unterhaching, DE;

Markus Schmitt, Neubiberg, DE;

Matthias Wegscheider, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/265 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/739 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 21/225 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66333 (2013.01); H01L 21/26586 (2013.01); H01L 29/0634 (2013.01); H01L 29/41766 (2013.01); H01L 29/6634 (2013.01); H01L 29/66719 (2013.01); H01L 29/66727 (2013.01); H01L 29/7395 (2013.01); H01L 29/7396 (2013.01); H01L 29/7802 (2013.01); H01L 21/2253 (2013.01); H01L 29/0696 (2013.01); H01L 29/0865 (2013.01); H01L 29/1095 (2013.01);
Abstract

A transistor device includes at least one transistor cell, having, in a semiconductor body, a source region of a first doping type in a body region of a second doping type, a drain region, and a drift region of the first doping type adjoining the body region and arranged between the body region and the drain region. A low-resistance region of the second doping type in the body region adjoins the source region. A gate electrode dielectrically insulated from the source and body regions by a gate dielectric is arranged above a first surface of the semiconductor body. A length of an overlap between the source region and the gate electrode is larger than 70 nanometers. A doping profile of the low-resistance region along a line that is vertical to the first surface and goes through an edge of the gate electrode has a maximum of higher than 1E19 cm.


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