The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

Aug. 22, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventor:

Marcel A. Kossel, Reichenburg, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H03F 1/02 (2006.01); H03F 3/45 (2006.01); G05F 3/08 (2006.01); G11C 7/10 (2006.01); G06F 3/06 (2006.01); G06F 13/16 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G05F 3/08 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 13/1668 (2013.01); G11C 7/1048 (2013.01); H03F 1/0211 (2013.01); H03F 3/45076 (2013.01); H03F 2203/45544 (2013.01); H03F 2203/45598 (2013.01); H03M 1/12 (2013.01);
Abstract

A receiver circuit is configured to receive input signals having a first reference voltage level. The first reference voltage level is a first logical high voltage level. The receiver circuit comprises an input stage comprising a resistive voltage divider. The resistive voltage divider is configured to convert the input signals having the first reference voltage level to input signals having a second reference voltage level. The second reference voltage level is a second logical high voltage level. The receiver circuit comprises a preamplifier configured to receive and amplify the input signals having the second reference voltage level.


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