The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2021
Filed:
Feb. 07, 2020
Applicant:
Gsi Technology, Inc., Sunnyvale, CA (US);
Inventors:
Lee-Lean Shu, Sunnyvale, CA (US);
Patrick Chuang, Sunnyvale, CA (US);
Chao-Hung Chang, Sunnyvale, CA (US);
Assignee:
GSI Technology, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/419 (2006.01); H03K 19/0944 (2006.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 11/412 (2013.01); H03K 19/09441 (2013.01);
Abstract
An ultra low VDD memory cell has a ratioless write port. In some embodiments, the VDD operation level can be as low as the threshold voltage of NMOS and PMOS transistors of the cell.
Quick Actions:
Shu, Lee-Lean. (2021). Ultra low vdd memory cell with ratioless write port (U.S. Patent No. 10943648). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10943648
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile