The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Nov. 28, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Dustin M. Hendrickson, Biggsville, IL (US);

Manish Motwani, Chicago, IL (US);

Assignee:

PURE STORAGE, INC., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); H03M 13/15 (2006.01); G06F 3/06 (2006.01); G06F 11/20 (2006.01); H04L 9/08 (2006.01); G06F 11/10 (2006.01); H04L 29/08 (2006.01); H04L 29/14 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1515 (2013.01); G06F 3/067 (2013.01); G06F 3/0608 (2013.01); G06F 3/0619 (2013.01); G06F 3/0644 (2013.01); G06F 3/0652 (2013.01); G06F 3/0659 (2013.01); G06F 11/1092 (2013.01); G06F 11/2094 (2013.01); H04L 9/085 (2013.01); H04L 9/0894 (2013.01); H04L 67/22 (2013.01); H04L 69/40 (2013.01); G06F 2201/805 (2013.01); G06F 2211/1028 (2013.01); H04L 2209/34 (2013.01);
Abstract

A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and a processing module operably coupled to the interface and memory such that the processing module, when operable within the computing device based on the operational instructions, is configured to perform various operations. The computing device detects a failed memory device (e.g., of a storage unit (SU) that stores at least one encoded data slice (EDS). The computing device then determines a DSN address range associated with at least some EDSs associated with a data object stored within the failed memory device and transmits the DSN address range to another computing device within the DSN to instruct restriction within the DSN of a memory access request for an EDSs associated with the data object that is stored within the failed memory device.


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