The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Oct. 07, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Yeonkwang Lee, Hwasung-Si, KR;

Sungmin Kang, Hwasung-Si, KR;

Kyungmin Kim, Hwasung-Si, KR;

Minhee Uh, Hwasung-Si, KR;

Jun-Gu Kang, Hwasung-Si, KR;

Youngmok Kim, Hwasung-Si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/49 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01); H01L 21/265 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4983 (2013.01); H01L 21/26513 (2013.01); H01L 27/092 (2013.01); H01L 27/1207 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/1087 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/7838 (2013.01);
Abstract

A semiconductor device includes a substrate, in which a lower semiconductor layer, an insulating gapfill layer, and an upper semiconductor layer are sequentially stacked. A gate structure is disposed on the upper semiconductor layer. A source/drain electrode is disposed on a sidewall of the gate structure. A semiconductor pattern is disposed between the source/drain electrode and the upper semiconductor layer. The gate structure includes a gate electrode and a spacer structure. The spacer structure includes a first spacer pattern, a second spacer pattern, and a third spacer pattern, sequentially disposed on a sidewall of the gate electrode. The semiconductor pattern is extended to a region below a bottom surface of the third spacer pattern and is connected to the second spacer pattern.


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