The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2021
Filed:
Nov. 03, 2017
Seagate Technology Llc, Cupertino, CA (US);
Zheng Wu, San Jose, CA (US);
Jason Bellorado, San Jose, CA (US);
Marcus Marrow, San Jose, CA (US);
Trung Thuc Nguyen, San Jose, CA (US);
Wing Fai Hui, San Jose, CA (US);
Kin Ming Chan, Freemont, CA (US);
Seagate Technology LLC, Fremont, CA (US);
Abstract
Systems and methods are disclosed for phase locking multiple clocks of different frequencies. In certain embodiments, an apparatus may be configured to downsample a first clock having a first frequency and a second clock having a second frequency into downsampled clocks having the same frequency. The apparatus may adjust a frequency of the second clock so that the downsampled clocks are phase aligned. The apparatus may reset counters of the divider circuits that perform the downsampling so align them to a counter for the first clock. A counter for the second clock may also be reset to align with the counter for the first clock. The synchronized clocks may be applied in data storage operations, such as self-servo writing operations, where the first clock may be a read clock and the second clock may be a write clock.