The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Feb. 21, 2019
Applicant:

Newronika S.r.l., Milan, IT;

Inventors:

Daniel Senderowicz, Berkeley, CA (US);

Mattia Arlotti, Rimini, IT;

Nicolò Vieno, Campodarsego, IT;

Lorenzo Rossi, Milan, IT;

Assignee:

Newronika S.R.L., Milan, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
A61N 1/36 (2006.01); A61N 1/05 (2006.01); A61N 1/16 (2006.01); A61B 5/04 (2006.01); A61B 5/00 (2006.01);
U.S. Cl.
CPC ...
A61N 1/36067 (2013.01); A61B 5/0006 (2013.01); A61B 5/04004 (2013.01); A61B 5/04017 (2013.01); A61N 1/0534 (2013.01); A61N 1/16 (2013.01); A61N 1/3605 (2013.01); A61N 1/36125 (2013.01); A61N 1/36135 (2013.01);
Abstract

Disclosed herein are apparatuses and methods for treating neurological disorders by electro-stimulation. The apparatus for treating neurological disorders includes at least one electrode implantable in the brain of a patient, and a processing and stimulation device connected to the at least one electrode. The processing and stimulation device may include a stimulation module configured to generate a stimulation signal to be sent to the at least one electrode, and an acquisition module that measures cerebral activity coming from the brain of the patient. The acquisition module may have a front-end block configured to amplify the potential difference of its input signals (V, V) and to filter a stimulus artifact and may include a multi-stage fully-differential switched capacitor circuit (e.g., an integrated circuit) configured for discrete-time signal processing.


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