The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Feb. 06, 2020
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Shunpei Yamazaki, Setagaya, JP;

Hidekazu Miyairi, Isehara, JP;

Akiharu Miyanaga, Hadano, JP;

Kengo Akimoto, Atsugi, JP;

Kojiro Shiraishi, Isehara, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); H01L 29/42384 (2013.01); H01L 29/66969 (2013.01); H01L 29/78618 (2013.01); H01L 27/1225 (2013.01);
Abstract

To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.


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