The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Aug. 14, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jae Kyu Lee, Hwasung-si, KR;

Ji Yoon Kim, Hwasung-si, KR;

Seung Sik Kim, Hwasung-si, KR;

Min Woong Seo, Hwasung-si, KR;

Ji Youn Song, Hwasung-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 5/369 (2011.01);
U.S. Cl.
CPC ...
H01L 27/1463 (2013.01); H01L 27/1464 (2013.01); H01L 27/14621 (2013.01); H01L 27/14623 (2013.01); H01L 27/14627 (2013.01); H01L 27/14636 (2013.01); H01L 27/14645 (2013.01); H01L 27/14685 (2013.01); H01L 27/14689 (2013.01); H04N 5/369 (2013.01);
Abstract

A semiconductor device includes a substrate having a first surface and a second surface opposite to the first surface. A device isolation layer which defines a first region, a second region, and a support region in the substrate. The second region has a smaller width than the first region, and the support region is between the first region and the second region. A photoelectric conversion element is in the first region. The support region is continuous with the first region and the second region. The device isolation layer has an integral insulation structure which extends through the substrate from the first surface of the substrate to the second surface of the substrate.


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