The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2021
Filed:
Apr. 12, 2018
Applicant:
Palo Alto Research Center Incorporated, Palo Alto, CA (US);
Inventors:
Julie A. Bert, East Palo Alto, CA (US);
Robert A. Street, Palo Alto, CA (US);
John C. Knights, Soquel, CA (US);
Assignee:
PALO ALTO RESEARCH CENTER INCORPORATED, Palo Alto, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01H 47/00 (2006.01); H01L 27/12 (2006.01); H01L 25/10 (2006.01); H01L 29/786 (2006.01); H01L 27/146 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1218 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 27/1222 (2013.01); H01L 27/14661 (2013.01); H01L 29/78663 (2013.01); H01L 29/78672 (2013.01); H01L 29/78693 (2013.01);
Abstract
Various designs are provided to mitigate or solve limitation on the bendability of an active matrix backplanes: including breaking large rigid silicon chips (ICs) into smaller rigid ICs, changing the orientation of rigid ICs, changing the placement of the ICs on the array, thinning the ICs to the point where the Si is flexible, and replacing the ICs with high quality TFT processing which can be done on flexible substrates.