The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2021
Filed:
Oct. 30, 2017
The Regents of the University of California, Oakland, CA (US);
Subramanian S. Iyer, Los Angeles, CA (US);
Takafumi Fukushima, Los Angeles, CA (US);
Adeel A. Bajwa, Los Angeles, CA (US);
Subramanian S. Iyer, Los Angeles, CA (US);
Takafumi Fukushima, Los Angeles, CA (US);
Adeel A. Bajwa, Los Angeles, CA (US);
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US);
Abstract
A fan-out wafer level package includes: (1) a flexible substrate; (2) a semiconductor component embedded in the flexible substrate, the semiconductor component including an active surface that is exposed from the flexible substrate, the semiconductor component including a bonding pad adjacent to the active surface; (3) a stress buffer layer disposed over the flexible substrate and the semiconductor component, the stress buffer layer defining an opening exposing the bonding pad of the semiconductor component; and (4) an interconnect disposed over the stress buffer layer and including a portion extending into the opening of the stress buffer layer to electrically connect to the bonding pad of the semiconductor component.