The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Jun. 29, 2018
Applicant:

Seagate Technology Llc, Cupertino, CA (US);

Inventors:

Benjamin J. Scott, Longmont, CO (US);

Steven S. Williams, Longmont, CO (US);

Assignee:

SEAGATE TECHNOLOGY LLC, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 9/48 (2006.01); G06F 13/16 (2006.01); G06F 11/10 (2006.01); G11C 16/10 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 9/4881 (2013.01); G06F 11/1076 (2013.01); G06F 12/0253 (2013.01); G06F 13/1663 (2013.01); G06F 13/1673 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7205 (2013.01);
Abstract

Apparatus and method for managing shared resources in a data storage device such as a solid-state drive (SSD). In some embodiments, a non-volatile memory (NVM) has a population of semiconductor memory dies to which are connected a number of parallel channel. A controller circuit apportions the semiconductor memory dies into a plurality of die sets each configured to store user data blocks associated with a different user during hot data transfers responsive to a sequence of host access commands. A shared resource is available for use by each of the die sets to support background data transfers not associated with the host access commands, such as a RAID buffer. The controller circuit arbitrates the use of the shared resource by each of the die sets in turn to sequentially perform the background data transfers to maintain a selected level of deterministic performance of the hot data transfers.


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