The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Apr. 08, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Kedar Satish Chitnis, Bengaluru, IN;

Charles Lance Fuoco, Allen, TX (US);

Sriramakrishnan Govindarajan, Bengaluru, IN;

Mihir Narendra Mody, Bengaluru, IN;

William A. Mills, Clarksburg, MD (US);

Gregory Raymond Shurtz, Houston, TX (US);

Amritpal Singh Mundra, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/54 (2006.01); G06F 9/50 (2006.01); G06F 9/38 (2018.01); G06F 9/455 (2018.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 9/546 (2013.01); G06F 9/3836 (2013.01); G06F 9/45558 (2013.01); G06F 9/4806 (2013.01); G06F 9/5027 (2013.01); G06F 2009/45583 (2013.01); G06F 2009/45587 (2013.01);
Abstract

This disclosure relates to various implementations an embedded computing system. The embedded computing system comprises a hardware accelerator (HWA) thread user and a second HWA thread user that creates and sends out message requests. The HWA thread user and the second HWA thread user is communication with a microcontroller (MCU) subsystem. The embedded computing system also comprises a first inter-processor communication (IPC) interface between the HWA thread user and the MCU subsystem and a second IPC interface between the second HWA thread user and the MCU subsystem, where the first IPC interface is isolated from the second IPC interface. The MCU subsystem is also in communication with a first domain specific HWA and a second domain specific HWA.


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