The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Jun. 20, 2019
Applicant:

Biosig Technologies, Inc., Los Angeles, CA (US);

Inventors:

Budimir S. Drakulic, Los Angeles, CA (US);

Sina Fakhar, Encino, CA (US);

Thomas G. Foxall, Surrey, CA;

Branislav Vlajinic, Los Angeles, CA (US);

Assignee:

BioSig Technologies, Inc., Westport, CT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/863 (2013.01); H04L 12/26 (2006.01); A61B 5/00 (2006.01); A61B 5/0402 (2006.01); G16H 40/63 (2018.01); A61B 5/0428 (2006.01); H03F 3/45 (2006.01); H03K 5/125 (2006.01); A61B 5/0215 (2006.01); A61B 5/0245 (2006.01); A61B 5/046 (2006.01); A61B 5/0464 (2006.01); A61B 18/14 (2006.01); H03H 17/02 (2006.01); A61B 18/00 (2006.01); H02H 9/04 (2006.01); H03F 3/68 (2006.01); A61B 5/024 (2006.01); A61B 5/0456 (2006.01); A61B 5/0472 (2006.01); A61B 5/0538 (2021.01);
U.S. Cl.
CPC ...
H04L 47/50 (2013.01); A61B 5/0215 (2013.01); A61B 5/0245 (2013.01); A61B 5/0402 (2013.01); A61B 5/046 (2013.01); A61B 5/0428 (2013.01); A61B 5/0464 (2013.01); A61B 5/4836 (2013.01); A61B 5/7203 (2013.01); A61B 5/7217 (2013.01); A61B 5/7225 (2013.01); A61B 5/7246 (2013.01); A61B 5/742 (2013.01); A61B 5/7435 (2013.01); A61B 18/1492 (2013.01); G16H 40/63 (2018.01); H03F 3/45475 (2013.01); H03K 5/125 (2013.01); H04L 43/02 (2013.01); A61B 5/0006 (2013.01); A61B 5/02405 (2013.01); A61B 5/0456 (2013.01); A61B 5/0472 (2013.01); A61B 5/0538 (2013.01); A61B 2018/00351 (2013.01); A61B 2018/00577 (2013.01); A61B 2562/18 (2013.01); A61B 2562/223 (2013.01); H01L 2924/14335 (2013.01); H02H 9/04 (2013.01); H02H 9/045 (2013.01); H03F 3/45 (2013.01); H03F 3/68 (2013.01); H03F 2200/129 (2013.01); H03F 2200/171 (2013.01); H03F 2200/234 (2013.01); H03F 2200/375 (2013.01); H03F 2200/451 (2013.01); H03F 2203/45116 (2013.01); H03F 2203/45528 (2013.01); H03F 2203/45601 (2013.01);
Abstract

Systems, methods, and computer program product embodiments are disclosed for processing and displaying multiple signals in near real-time. An embodiment operates by processing, using a first digital signal processor (DSP) of a first signal module, a first packet associated with a first signal. The embodiment also processes, using a second DSP of a second signal module, a second packet associated with a second signal. The embodiment equalizes a first processing delay associated with the first DSP with a second processing delay associated with the second DSP such that the first DSP completes processing of the first packet approximately simultaneously with the second DSP completing processing of the second packet. The embodiment then displays the processed first packet approximately simultaneously with the display of the processed second packet.


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