The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Feb. 10, 2020
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Markus Muellauer, Faak am See, AT;

Thomas Ferianz, Bodensdorf, AT;

Hermann Gruber, Woerth a. D., DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/691 (2006.01); H03K 17/567 (2006.01);
U.S. Cl.
CPC ...
H03K 17/691 (2013.01); H03K 17/567 (2013.01);
Abstract

A circuit arrangement is enclosed. The circuit arrangement includes a first electronic circuit; a second electronic circuit; and a coupling circuit connected between the first electronic circuit and the second electronic circuit. The first electronic circuit is at least partially integrated in a first region of a semiconductor layer, the second electronic circuit is at least partially integrated in a second region of the semiconductor layer, and the second region adjoins a first insulating layer formed on a first surface of the semiconductor layer and is electrically insulated from the first region by a second insulating layer. Further, the coupling circuit is arranged in a third insulating layer formed on a second surface of the semiconductor layer and comprises at least two capacitors connected in series.


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