The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Feb. 27, 2019
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Hiroyuki Yamashita, Mie, JP;

Shinji Mori, Aichi, JP;

Keiichi Sawa, Mie, JP;

Kazuhiro Matsuo, Mie, JP;

Kazuhisa Matsuda, Mie, JP;

Yuta Saito, Mie, JP;

Atsushi Takahashi, Mie, JP;

Masayuki Tanaka, Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

A semiconductor memory device includes a channel layer and a gate electrode. A first insulating layer is between the semiconductor layer and the gate electrode. A second insulating layer is between the first insulating layer and the gate electrode. A storage region is between the first insulating layer and the second insulating layer. The storage region comprises metal or semiconductor material. A coating layer comprises silicon and nitrogen and surrounds the storage region. The coating layer is between the storage region and the second insulating layer and between the storage region and the first insulating layer.


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