The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 2021
Filed:
Feb. 06, 2019
Applicant:
Fuji Electric Co., Ltd., Kanagawa, JP;
Inventors:
Hideyo Nakamura, Nagano, JP;
Tatsuo Nishizawa, Nagano, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/49 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 21/4846 (2013.01); H01L 23/49 (2013.01); H01L 24/33 (2013.01); H01L 24/83 (2013.01); H01L 25/072 (2013.01); H01L 2224/33181 (2013.01);
Abstract
A semiconductor device includes: an insulated circuit board including metal layers having recesses, and an insulating board having an upper surface on which the metal layers are arranged; external terminals having bottom ends with a width narrower than the width of openings of the recesses, these bottom ends being inserted into the recesses; a printed circuit board that directly supports the external terminals; and first bonding material that is arranged inside the recesses and respectively conductively connects the bottom ends of the external terminals to the metal layers.