The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Mar. 15, 2019
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Kihyun Pyun, Gwangmyeong-si, KR;

Seung-woon Shin, Asan-si, KR;

Eui-myeong Cho, Anyang-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); H03L 7/08 (2006.01); H03F 3/45 (2006.01); H03H 11/04 (2006.01);
U.S. Cl.
CPC ...
G09G 5/008 (2013.01); H03F 3/45179 (2013.01); H03H 11/04 (2013.01); H03L 7/0807 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01); G09G 2310/08 (2013.01); H03F 2203/45022 (2013.01); H03F 2203/45156 (2013.01);
Abstract

A receiving circuit includes a first capacitor connected to a first signal line, a second capacitor connected to a second signal line. A first bias control circuit may convert a common mode voltage of a first received signal provided through the first capacitor to a first voltage level to output a first biased signal. A second bias control circuit may convert a common mode voltage of a second received signal provided through the second capacitor to a second voltage level to output a second biased signal. A balance compensation circuit may receive the first biased signal and the second biased signal, compensate for an offset voltage of the first biased signal based on the second biased signal, and compensate for an offset voltage of the second biased signal based on the first biased signal to output a first differential signal and a second differential signal.


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