The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Apr. 30, 2019
Applicants:

Chongqing Boe Optoelectronics Technology Co., Ltd., Chongqing, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Junhong Lu, Beijing, CN;

Bo Xu, Beijing, CN;

Shuai Hou, Beijing, CN;

Xinxin Wu, Beijing, CN;

Xiang Fang, Beijing, CN;

Tonghui Li, Beijing, CN;

Zheng Wang, Beijing, CN;

Zhengkun Shao, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); H01L 27/32 (2006.01); G02F 1/1368 (2006.01); G02F 1/1365 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G02F 1/1365 (2013.01); G02F 1/1368 (2013.01); G02F 1/13454 (2013.01); G02F 1/136286 (2013.01); H01L 27/3262 (2013.01); H01L 27/3267 (2013.01); H01L 27/3276 (2013.01); G02F 2001/133342 (2013.01); G09G 2300/023 (2013.01); H01L 27/1251 (2013.01); H01L 27/1255 (2013.01);
Abstract

A display panel includes a first display sub-panel and a second display sub-panel disposed opposite to each other, the first display sub-panel including a plurality of first gate lines and the second display sub-panel including a plurality of second gate lines. The display panel further includes a plurality of single-way conducting switches, the first gate lines, the second gate lines and the single-way conducting switches being disposed in one-to-one correspondence, each of the single-way conducting switches having an input end which is electrically connected to the corresponding first gate line and an output end which is electrically connected to the corresponding second gate line, and each of the single-way conducting switches being unidirectionaly conducted from the corresponding first gate line to the corresponding second gate line.


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