The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Mar. 27, 2017
Applicant:

Cymbet Corporation, Elk River, MN (US);

Inventors:

Jeffrey S. Sather, St. Michael, MN (US);

Steve W. Tonkin, Eden Prairie, MN (US);

Jeffrey D. Mullin, Elk River, MN (US);

Assignee:

CYMBET Corporation, Elk River, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/06 (2006.01); H01M 10/0562 (2010.01); H01M 10/0585 (2010.01); G06F 1/26 (2006.01); G06F 1/3237 (2019.01); G06F 1/3287 (2019.01); G06F 1/3296 (2019.01); H01M 10/052 (2010.01); G06F 1/32 (2019.01);
U.S. Cl.
CPC ...
G06F 1/06 (2013.01); G06F 1/26 (2013.01); G06F 1/263 (2013.01); G06F 1/32 (2013.01); G06F 1/3237 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); H01M 10/052 (2013.01); H01M 10/0562 (2013.01); H01M 10/0585 (2013.01); Y02E 60/10 (2013.01);
Abstract

A real time clock and power management integrated circuit consists of a) an RTC block comprising an internal clock generator for generating a system clock signal that controls a device and b) a power management block. The power management block comprises primary and backup power source connections, a Feed Power Downconverter Component, a backup power source charger power booster/regulator component to increase or regulate voltage from the primary power source to a predetermined charger input voltage, a charge control logic component, a backup power source cut-off logic component, and a mode control logic component to enable operation of the charge control logic component and the battery cut-off logic component under predetermined conditions.


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