The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2021

Filed:

Nov. 27, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Darryl Becker, Rochester, MN (US);

Mark J. Jeanson, Rochester, MN (US);

Gerald Bartley, Rochester, MN (US);

Matthew Doyle, Chatfield, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/10 (2006.01); H05K 7/12 (2006.01); H01L 23/498 (2006.01); H01L 23/58 (2006.01); H05K 1/18 (2006.01); H05K 1/02 (2006.01); H05K 3/34 (2006.01); H01G 4/30 (2006.01); H01G 4/232 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 23/58 (2013.01); H05K 1/0243 (2013.01); H05K 1/181 (2013.01); H05K 3/3436 (2013.01); H01G 4/232 (2013.01); H01G 4/30 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/1053 (2013.01); H05K 2201/10378 (2013.01); H05K 2201/10515 (2013.01);
Abstract

A direct current (DC) blocking capacitor can be used with an integrated circuit (IC) package. The DC blocking capacitor can include a first electrically conductive planar surface having a first area and a second electrically conductive planar surface having a second area greater than the first area. The second planar surface is in a parallel planar orientation to the first planar surface. The DC blocking capacitor can also include a first set of electrically conductive plates electrically connected to the first planar surface and a second set of electrically conductive plates electrically connected to the second planar surface. The second set of electrically conductive plates is interleaved with and electrically insulated from the first set of electrically conductive plates by a dielectric material.


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