The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2021

Filed:

Aug. 29, 2018
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Inventors:

Youming Tsao, Taipei, TW;

Cong Yao, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/3234 (2019.01); G06F 1/324 (2019.01); G06F 1/32 (2019.01); G06F 1/3225 (2019.01); G11C 11/4074 (2006.01); G11C 7/10 (2006.01); G06F 1/3206 (2019.01); G06F 1/3296 (2019.01); G06F 1/08 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3275 (2013.01); G06F 1/08 (2013.01); G06F 1/32 (2013.01); G06F 1/324 (2013.01); G06F 1/3206 (2013.01); G06F 1/3225 (2013.01); G06F 1/3296 (2013.01); G06F 11/3037 (2013.01); G11C 7/1066 (2013.01); G11C 11/4074 (2013.01);
Abstract

The present disclosure provides a control system and a control method for a double data rate synchronous dynamic random access memory (DDR) system in order to reduce power consumption of the DDR system. The system includes a memory and a processor coupled to the memory, and the processor is configured to monitor a working status of each functional system that shares a power domain with the DDR system, determine a target power parameter value and a target clock parameter value of the DDR system according to the working status of each functional system, and control a power parameter and a clock parameter of the DDR system according to the target power parameter value and the target clock parameter value of the DDR system.


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