The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2021
Filed:
Feb. 25, 2019
Applicant:
Marvell Asia Pte, Ltd., Singapore, SG;
Inventors:
Assignee:
Marvell Asia Pte, Ltd., Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); H03K 5/135 (2006.01); H03L 7/10 (2006.01); H03L 7/18 (2006.01); H03L 7/197 (2006.01); H03L 7/23 (2006.01);
U.S. Cl.
CPC ...
H03K 5/135 (2013.01); H03L 7/0992 (2013.01); H03L 7/10 (2013.01); H03L 7/18 (2013.01); H03L 7/1974 (2013.01); H03L 7/1976 (2013.01); H03L 7/23 (2013.01); H03L 2207/06 (2013.01); H03L 2207/12 (2013.01);
Abstract
Embodiments described herein provide a system having phase synchronized local oscillator paths. The system includes a first circuit, which in turn includes a first counter configured to generate a first counter output signal in response to a first clock signal controlling the first counter. The first circuit also includes a first phase-locked loop coupled to the first counter. The first phase-locked loop is configured to receive the first counter output signal as a first synchronization clock for the first phase-locked loop and to generate a first output signal having rising edges aligned according to the first counter output signal.