The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Jan. 14, 2019
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Nadim Khlat, Cugnaux, FR;

James M. Retz, Cedar Rapids, IA (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 3/19 (2006.01); H04W 52/04 (2009.01);
U.S. Cl.
CPC ...
H03F 1/0227 (2013.01); H03F 3/19 (2013.01); H04W 52/04 (2013.01); H03F 2200/102 (2013.01); H03F 2200/321 (2013.01); H03F 2200/451 (2013.01);
Abstract

An envelope tracking (ET) amplifier circuit is provided. The ET amplifier circuit includes an ET voltage circuit configured to generate an ET modulated voltage based on a supply voltage for amplifying a radio frequency (RF) signal. The ET modulated voltage corresponds to a time-variant voltage envelope, which can be misaligned from a time-variant signal envelope of the RF signal due to an inherent temporal delay in the ET amplifier circuit. A voltage processing circuit is provided in the ET amplifier circuit to reduce dynamic range of the ET modulated voltage to help improve delay sensitivity in the ET amplifier circuit. A control circuit is configured to reduce the supply voltage according to the dynamic range to help maintain system-wide efficiency of the ET amplifier circuit at a defined level. As such, it may be possible to improve delay sensitivity and maintain sufficient system-wide efficiency in the ET amplifier circuit.


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