The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Aug. 30, 2019
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Shinichi Sasaki, Tokyo, JP;

Daisuke Miyashita, Kawasaki Kanagawa, JP;

Jun Deguchi, Kawasaki Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/56 (2006.01); G11C 13/00 (2006.01); G11C 16/26 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5621 (2013.01); G11C 11/56 (2013.01); G11C 11/5642 (2013.01); G11C 11/5678 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a memory, a controller, and a sense amplifier. The memory includes a plurality of memory cells, wherein each of the memory cells can store a multi level indicating one data. The controller writes the multi level to one cell of the memory. The sense amplifier performs unary read of data from the multi level written in the one cell. The data is data in which an error of a predetermined lower significant bit is allowed. The controller reads data indicated by the multi level stored in the one cell of the memory from the sense amplifier.


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