The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Nov. 21, 2019
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Viacheslav Dubeyko, San Jose, CA (US);

Luis Cargnini, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/065 (2013.01); G06F 3/0619 (2013.01); G06F 3/0644 (2013.01); G06F 3/0688 (2013.01);
Abstract

A Memory Device (MD) includes a Non-Volatile Memory (NVM) including a first memory array and a second memory array. An address is associated with a first location in the first memory array and with a second location in the second memory array. A read command is received to read data for the address, and it is determined whether data stored in the NVM for the address is persistent. If not, it is determined whether data for the address has been written for the address after a last power-up of the MD. The read command is performed by returning zeroed data if data has not been written for the address after the last power-up. If data has been written after the last power-up, data stored in the first location is returned. In one aspect, a processor sends a command to the MD setting a volatility mode for the MD.


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