The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Sep. 27, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Marius Vicentiu Dina, Inver Grove Heights, MN (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/26 (2006.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
G05F 3/26 (2013.01); H02M 3/158 (2013.01); G05F 3/267 (2013.01);
Abstract

A CML to CMOS signal conversion system includes a CML/CMOS converter coupled to a resistor, which is further coupled to a current compensation circuit at a reference node. The CML/CMOS converter receives a differential signal and applies a first or a second current to the reference node through the resistor. The current compensation circuit comprises a differential transistor pair coupled to a current source, a transistor, and a first, a second, and a third current mirror. The differential transistor pair receives the differential signal and has a pair of output terminals. The first current mirror is coupled to the output terminals. The third current mirror is coupled to the reference node. The first and third current mirror are coupled together by the transistor and sink the first current. The second current mirror is coupled to the output terminals and the reference node and sinks the second current.


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