The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Aug. 28, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Jasjot Singh Chadha, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/52 (2006.01); H04R 3/00 (2006.01); H03F 3/45 (2006.01); H03G 3/30 (2006.01); H03F 3/217 (2006.01);
U.S. Cl.
CPC ...
H03F 1/52 (2013.01); H03F 3/217 (2013.01); H03F 3/45 (2013.01); H03G 3/3005 (2013.01); H04R 3/007 (2013.01); H03F 2200/03 (2013.01); H03F 2203/45151 (2013.01); H03F 2203/45528 (2013.01);
Abstract

A circuit comprises a sensing resistor with a resistance Rs, a first amplifier circuit with a first gain factor G, a second amplifier circuit with a second gain factor (1/A), a third amplifier circuit, a current mirror, a buffer, and a peak voltage detector. The first amplifier circuit is coupled to the sensing resistor at a first node and a second node and to the second amplifier circuit, which is further coupled to the current mirror. The buffer is coupled to the current mirror and to the third amplifier circuit, which is further coupled to the peak voltage detector and configured to receive a voltage across a load and a voltage on a ground node. In some implementations, the load is a speaker. In some implementations, a filter is coupled between the first and the second amplifier circuits.


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